CMOS technology, VLSI design flow, HDL basics and FPGA.
It follows the BTEUP (Board of Technical Education, Uttar Pradesh) diploma syllabus for VLSI Design (Electronics Engineering, Semester 6). If your own board's or institute's syllabus differs, the centre follows your own syllabus.
Yes. Teaching is unit-wise as per the BTEUP scheme, with previous-year question practice, MCQ tests and doubt sessions before the semester exam.
Free simulators such as Icarus Verilog / EDA Playground, and Xilinx Vivado or Intel Quartus for FPGA flow where available.
