Digital System Design (B.Tech)

Logic minimisation, combinational and sequential circuits, logic families and Verilog HDL.

6 MonthsDuration 5Chapters29Topics

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Syllabus · पाठ्यक्रम

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01Unit 1: Logic Minimisation and Combinational Circuits 7 topics

Number systems and codes
Boolean algebra and canonical forms
K-map up to five variables
Quine-McCluskey method
Adders, subtractors and carry look-ahead adder
Multiplexers, demultiplexers, encoders and decoders
Comparators and parity circuits

02Unit 2: Sequential Circuits 6 topics

Latches and flip-flops
Flip-flop conversions and timing parameters
Shift registers
Ripple and synchronous counters
Ring and Johnson counters
Design of synchronous counters

03Unit 3: Finite State Machines 5 topics

Mealy and Moore models
State diagram and state table
State reduction and state assignment
Sequence detector design
ASM charts

04Unit 4: Logic Families, Memories and PLDs 5 topics

Characteristics: fan-out, noise margin, propagation delay, power
TTL, ECL and CMOS families
ROM and RAM
PLA and PAL
CPLD and FPGA (introduction)

05Unit 5: Verilog HDL 6 topics

Modules, ports and data types
Operators
Gate-level and dataflow modelling
Behavioural modelling: always and initial blocks
Blocking and non-blocking assignments
Test benches and simulation

About

You will be able to

Minimise logic functions with K-maps and the Quine-McCluskey method
Design combinational circuits such as adders, comparators, multiplexers and decoders
Design flip-flop based registers and synchronous and asynchronous counters
Design Mealy and Moore finite state machines such as sequence detectors
Compare TTL, ECL and CMOS logic families and explain memories and PLDs
Write Verilog HDL code for combinational and sequential circuits

Who it is for

B.Tech Electronics & Communication Engineering students of Semester 3 under AKTU
Students preparing for AKTU examinations, GATE digital electronics and VLSI basics

What you need

Basic Electronics of the first year and number systems

Questions

Which syllabus is followed?

The current AKTU (Dr. A.P.J. Abdul Kalam Technical University, Lucknow) B.Tech syllabus of Digital System Design (Electronics & Communication Engineering, Semester 3). If your university or college follows a different syllabus, the centre teaches from your own university syllabus.

How is the subject examined?

AKTU assesses it through sessional tests, assignments and attendance, and an end-semester university examination; the centre covers every unit with theory, derivations and numericals.

Are previous-year questions practised?

Yes. Unit-wise AKTU previous-year questions, short-answer questions and the test series are solved in class.